The present disclosure herein relates to a semiconductor memory device, and more particularly, to a three-dimensional semiconductor memory device.
There continues to be an ever-increasing demand for further integration of semiconductor devices having superior performance and lower price. In semiconductor memory devices, a higher integration degree is particularly necessary, since the integration degree is a significant factor in determining the resulting price. In present two-dimensional or planar memory semiconductor devices, since the integration degree is determined by the occupying area of a unit memory cell, the integration degree is considerably affected by the technique for forming fine patterns. In order to achieve the formation of minute patterns, however, highly expensive equipment is necessary.
As an alternative, development continues on techniques for forming three-dimensionally memory cells. According to these techniques, since memory cells are arranged in three-dimensions, the area of semiconductor substrate is effectively utilized. As a result, the integration degree may be largely increased as compared to the known two-dimensional memory semiconductor devices. In addition, word lines can be formed by using a patterning process to define an active region, thereby greatly reducing a manufacturing cost per unit bit of memory.